Supercomputing Breakthroughs on Display at SC11
The annual SC11 (Supercomputing 2011) international conference on high-performance computing (HPC) is taking place this week in Seattle, WA. I attended last year in New Orleans, and can tell you it’s an impressive — nearly overwhelming — display of cutting-edge computing technologies. This year, DE’s Executive Editor Steve Robbins is there and will be filing a wrap-up report, but we wanted to fill you in on some of the big announcements already made at the show.
Jen-Hsun Huang, founder and CEO of NVIDIA, gave the keynote address at 8:30 a.m. Pacific this morning. Prior to founding NVIDIA, Huang held engineering, marketing, and general management positions at LSI Logic, and was a microprocessor designer at Advanced Micro Devices.
Huang talked about the use of energy in CPUs limiting the ability to achieve exascale computing. He said it would take today’s CPU architecture 20 megawatts of power to reach exascale computing, and that it wouldn’t happen until 2035 with the current technology. He said new technology would be needed to reach the exaflop computing level by 2019, which is a goal of the industry.
NVIDIA has already made news at the show by announcing its Maximus technology. NVIDIA Maximus brings together the 3D graphics capability of NVIDIA Quadro professional graphics processing units (GPUs) with the parallel-computing power of the NVIDIA Tesla C2075 companion processor — under a unified technology that the company says transparently assigns work to the right processor. DE‘s senior editor, Kenneth Wong, says NVIDIA’s Maximus technology is expected to let you work in a CAD modeling program, render photorealistic product shots, and run simulation jobs — all at the same time. For more on Maximus, check out Kenneth’s Virtual Desktop blog post, which includes a podcast interview with David Watters, NVIDIA’s senior director of marketing for manufacturing and design segments.
NVIDIA is targeting Maximus squarely at the design engineering market. Check out how the company says Maximus speeds photorealistic rendering in Dassault Systemes’ CATIA V6:
The video from NVIDIA below shows part of Huang’s keynote address:
Not to be outdone, AMD also made a splash at the show with the launch and availability of its AMD Opteron 6200 and 4200 Series processors (formerly code-named “Interlagos” and “Valencia”). The 6200 Series processors push multi-core computing to a 16-core configuration per X86-based socket. The company claims up to 84% higher performance, increased scalability for virtualization with up to 73% more memory bandwidth, and half the power consumption per core, requiring two-thirds less floor space and up to two-thirds lower platform price. AMD also announced the expansion of its 2012 roadmap with the addition of the new AMD Opteron 3000 Series platform. The AMD Opteron 3000 Series platform is targeted to the ultra-dense, ultra-low power 1P Web Hosting/Web Serving and Microserver markets. The first processor will be the 4- to 8-core CPU code-named “Zurich,” which is expected to ship in the first half of 2012. “Zurich” is based on the company’s new “Bulldozer” architecture and leverages the new Socket AM3+.
According to CRN, Intel will also make news at SC11: It is planning to re-enter the HPC market with new motherboards and chassis for its Sandy Bridge processors and Romley architecture. While the company hasn’t released much details on that front yet, yesterday it introduced two new processors: the Intel Core i7-3960X processor Extreme Edition and the Intel Core i7-3930K. These are the first six-core client processors in the second-generation “Sandy Bridge” Intel Core processor family. With more than 2 billion transistors, Intel’s latest client processors offer the processing power equivalent of approximately 365,000 Intel 4004 processors, according to the company, which is celebrating the 40th anniversary of the Intel microprocessor this month.
Learn more about the history of Intel’s microprocessor and in this video the company produced to celebrate the 40th anniversary of the 4004:
Each year, SC11 hosts Scinet, one of the fastest computer networks in the world. More than 150 engineers hailing from industry, academia and government institutions have volunteered their time over the past year to plan and build SCinet using over $27 million in donated equipment from vendors from around the world. The network will serve as the primary backbone supporting all 10,000+ SC conference attendees and exhibitors. This year, for the first time, Scinet will connect multiple 100 Gbps circuits in collaboration with research networks, including the Department of Energy’s ESnet, National LambdaRail, and CANARIE who are donating this bandwidth to support the conference. In total, SCinet will deliver more than 450 Gigabits per second in total capacity to the Washington State Convention Center.
The conference also coincides with the semi-annual publication of the list of top 500 supercomputers. Japan’s “K Computer” maintained its position atop the newest edition of the TOP500 List of the world’s most powerful supercomputers, thanks to a full build-out that makes it four times as powerful as its nearest competitor. Installed at the RIKEN Advanced Institute for Computational Science (AICS) in Kobe, Japan, the K Computer it achieved 10.51 Petaflop/s on the Linpack benchmark using 705,024 SPARC64 processing cores. The K Computer is the first supercomputer to achieve a performance level of 10 Petaflop/s, or 10 quadrillion calculations per second. In June 2011, the partially built K computer had taken the No. 1 position with a performance of 8.16 Petaflop/s. Contrary to many other recent very large systems, it does not utilize graphics processors or other accelerators. The K Computer is also one of the most energy efficient systems on the list. Hans Meuer of the University of Mannheim, Germany; Erich Strohmaier and Horst Simon of NERSC/Lawrence Berkeley National Laboratory; and Jack Dongarra of the University of Tennessee, Knoxville compiled this year’s list.